EASA / CAR Part-66 · Module 5 · 5.6 Basic Computer Structure · Cat B1/B2

The Fetch–Decode–Execute Cycle

A processor does one thing, endlessly: fetch the instruction the program counter points at, decode it, execute it. Step through the cycle and watch which bus carries what, the address bus always outward from the CPU, the data bus both ways.

Program counter
,
Instruction reg.
,
Accumulator
,
Phase
,

The program counter holds the address of the next instruction, the instruction register holds the one being executed now. That distinction is a standard exam question. Note the bus directions: the address bus is unidirectional, driven only by the CPU; the data bus is bidirectional; the control bus carries the read/write, clock and interrupt lines that make each transfer happen at the right moment.