Microprocessors
Functions performed and overall operation of a microprocessor; the fetch-decode-execute cycle, the register set, interrupts and clocking. Examined for Category B2.
Microprocessors, summary notes
- A microprocessor executes a stored program by repeating the FETCH → DECODE → EXECUTE cycle, driven by the system clock. One pass through the cycle handles one instruction.
- FETCH: the program counter (PC) puts the address of the next instruction on the address bus; the instruction returns on the data bus into the instruction register (IR); the PC increments.
- DECODE: the control unit interprets the opcode in the IR and sets up the internal data paths. EXECUTE: the ALU performs the operation and the result goes to a register or memory.
- Key registers: the accumulator (holds ALU operands and results), the program counter (address of the NEXT instruction), the instruction register (the current instruction), the stack pointer (top of the stack) and the status/flag register (zero, carry, negative, overflow).
- Interrupts break into the cycle: the current state is pushed onto the stack, the processor services the interrupt, then restores state and resumes, this is how a processor responds to time-critical aircraft events without polling.
- Clock speed sets the instruction rate; word length (8, 16, 32 bit) sets how much data is handled per operation.
- ⚠ Exam trap: the program counter holds the address of the NEXT instruction, not the current one, the instruction register holds what is being executed now.
- Instruction cycle
- FETCH → DECODE → EXECUTE (repeat)
- Clock period
- T = 1 ÷ f
During a fetch, which bus carries the address and which carries the instruction?
The address bus carries the address from the program counter to memory (unidirectional, CPU outward); the instruction itself returns to the CPU on the bidirectional data bus, and the control bus asserts the read line that makes it happen.
Why must the processor save its registers when an interrupt occurs?
So the interrupted program can be resumed exactly where it stopped. The current PC and status are pushed onto the stack before the interrupt service routine runs, and popped back afterwards, without that, the return would resume with corrupted state.
Microprocessors concept map
Microprocessors
Microprocessors quiz
Microprocessors, quiz
1. The address of the next instruction to be executed is held in the:
Program counterAccumulatorStack pointer2. The instruction cycle is:
Fetch, decode, executeDecode, fetch, executeExecute, fetch, decode3. The register holding the operand and result of an ALU operation is the:
AccumulatorProgram counterInstruction register4. During a fetch, the instruction returns to the CPU on the:
Data busAddress busControl bus5. Zero, carry and overflow indications are held in the:
Status / flag registerStack pointerProgram counter6. When an interrupt occurs, the processor first:
Saves its current state on the stackResets the program counter to zeroClears the accumulator7. The stack pointer holds:
The address of the top of the stackThe next instructionThe ALU result8. The block that interprets the opcode and sets up the internal data paths is the:
Control unitALUAccumulator9. The rate at which instructions are executed is set primarily by the:
Clock frequencySupply voltageNumber of address lines10. A processor's word length determines:
How many bits are processed in one operationHow fast the clock can runHow many interrupts it supports