Basic Computer Structure
Computer terminology; the CPU, memory and input/output blocks; the address, data and control buses; memory devices, RAM, ROM, PROM, EPROM, EEPROM and Flash, and their volatility.
Basic computer structure, summary notes
- A computer has four functional blocks: input, the central processing unit (CPU), memory, and output. The CPU itself contains the arithmetic and logic unit (ALU), the control unit and the registers.
- Three buses interconnect them: the ADDRESS bus (unidirectional, CPU → memory, selects a location), the DATA bus (bidirectional, carries the contents) and the CONTROL bus (read/write, clock, interrupt, reset).
- The width of the address bus fixes how much memory can be addressed, n address lines reach 2ⁿ locations. The width of the data bus fixes how many bits move at a time.
- RAM is volatile read/write working memory and loses its contents at power-off. Static RAM holds data in flip-flops; dynamic RAM stores it as charge and must be refreshed.
- The ROM family is non-volatile: ROM is masked at manufacture, PROM is one-time programmable, EPROM is erased by ultraviolet light, EEPROM and Flash are erased and rewritten electrically, which is what makes on-aircraft data loading possible.
- Software is loaded and configuration-controlled; the aircraft data loader writes to non-volatile memory so the loaded part number survives a power cycle.
- ⚠ Exam trap: "volatile" refers to loss of data at power-off, not to how quickly it can be changed. EEPROM is electrically erasable but still non-volatile.
- Addressable locations
- locations = 2ⁿ for n address lines
- Bus directions
- address = unidirectional · data = bidirectional · control = mixed
- Byte multiples
- 1 byte = 8 bits · 1 kB = 1024 bytes
A processor has a 16-bit address bus and an 8-bit data bus. How much memory can it address, and in what size chunks?
2¹⁶ = 65 536 locations. With an 8-bit data bus each location holds one byte, so the addressable memory is 64 kB, transferred one byte at a time.
A fault report says an LRU "lost its configuration after a power interruption". Which memory type is implicated?
The configuration was being held in volatile memory (RAM) instead of a non-volatile device such as EEPROM or Flash, either a battery/keep-alive supply has failed or the write to non-volatile memory did not complete.
The fetch-decode-execute cycle
Computer structure concept map
Basic Computer Structure
Basic computer structure quiz
Basic Computer Structure, quiz
1. The three buses in a basic computer are address, data and:
ControlParityClock2. Which memory type loses its contents when power is removed?
RAMROMEEPROM3. The address bus is:
Unidirectional, from the CPU outwardBidirectionalUnidirectional, into the CPU4. A processor with a 16-bit address bus can address:
65 536 locations16 384 locations256 locations5. The arithmetic and logic unit is part of the:
CPUMemoryInput/output section6. Which memory is erased by ultraviolet light?
EPROMEEPROMPROM7. Which device allows on-aircraft reprogramming without removal?
Flash / EEPROMMasked ROMStatic RAM8. Dynamic RAM differs from static RAM in that it:
Stores data as charge and must be refreshedRetains data without powerCannot be written to9. The width of the data bus determines:
How many bits are transferred at a timeHow much memory can be addressedThe clock frequency10. One byte consists of:
8 bits4 bits16 bits11. A PROM is:
Programmable once, then permanentReprogrammable electricallyVolatile12. An LRU loses its stored configuration after a power interruption. This points to the configuration being held in:
Volatile memoryMasked ROMFlash memory